Weimin Fu

Ph.D. Student, Electrical and Computer Engineering · Lehigh University

I am a Ph.D. student in Electrical and Computer Engineering at Lehigh University, advised by Dr. Xiaolong Guo. I joined Lehigh in Fall 2026, continuing the work I began with Dr. Guo at Kansas State University.

My research sits at the intersection of hardware and system security, electronic design automation (EDA) with large language models, and secure and trustworthy AI. I am particularly interested in:

  • LLM-assisted RTL design, verification, and debugging
  • Hardware-level threats (fault injection, undervolting, poisoning) targeting AI models on edge devices
  • Building benchmarks and datasets that push domain-adapted LLMs forward in hardware EDA
  • Cross-domain applications of AI security to biomedical, health, and social systems

Before Lehigh I spent five years as a Ph.D. student at Kansas State University. I received my M.S. in Electrical Engineering from The George Washington University (2020) and my B.Eng. in Information Engineering from Zhejiang University (2017).

You can find my work on Google Scholar, the models and datasets I release on Hugging Face, and my code on GitHub.

Contact: wef326 [at] lehigh [dot] edu

News

September 2026

Two papers accepted as oral presentations at AsianHOST 2026. “ScanFree” brings LLM-guided sequential ATPG to circuits where scan chains are inadmissible, and “Control-Flow Collapse” hijacks Mixture-of-Experts routing via single-bit faults in the gating path.

August 2026

Started my Ph.D. at Lehigh University, continuing with Dr. Xiaolong Guo.

July 2026

Paper “FinHardBench” accepted at COLM 2026. Can LLMs generate not just correct, but fast hardware? A benchmark of 33 financial FPGA tasks with a timing-aware evaluation flow.

May 2026

Paper “Configuration Over Selection” accepted (Long) at IEEE LAD 2026 — hyperparameter sensitivity beats model choice for open-source LLMs in RTL generation.

May 2026

Admitted to the Ph.D. program at Lehigh University.

April 2026

Two papers accepted at GLSVLSI 2026 — Synthesis-in-the-Loop evaluation of LLMs for RTL generation, and Control-Flow Collapse on MoE accelerators.

April 2026

Gave invited talk “Cognitive Silicon” at the 2026 ARISE Annual Symposium (Lawrence, KS).

December 2025

Selected as Graduate Student-of-the-Month by the K-State College of Engineering.

October 2025

Two papers accepted at AsianHOST 2025 — work on hidden vulnerabilities of edge LLMs under power stress, and FixBench-RTL benchmark for LLM-based RTL debugging.